Salvatore Pontarelli is a researcher at CNIT (Italian Consortium of telecomunication), in the research unit of University of Rome Tor Vergata. He received the Laurea degree in Electronic Engineering from the University of Bologna in 1999 and the PhD in Microelectronics and Telecommunications Engineering from the University of Rome Tor Vergata in 2003. Historically, his research mainly focused on fault tolerance, on-line testing and error correction codes. Since 2009, he started an inter-disciplinar cooperation between digital electronic design and networking, and in particular on the use of Field Programmable Gate Array (FPGA) for development of wire-speed network monitoring applications. In particular, for his work on the use of Bloom filters for error detection in Content Addressable Memories, he recently received a Cisco Research Award.
During 2017, he is visiting the NewNet@Paris team in the context of a collaboration on the Vector Packet Processor (VPP) technology put forward in the FD.io Linux Foundation project.